1. Field of the Invention
This invention relates to semiconductor device manufacturing, and more particularly, to a method for fabricating a metal layer with a substantially smooth surface.
2. Description of the Related Art
The following descriptions and examples are not admitted to be prior art by virtue of their inclusion within this section.
In most cases, a material may include a plurality of peaks and valleys upon its surface, which are associated with the surface roughness of the material. Such peaks and valleys may be visible by the naked eye or through an optical microscope, an electron microscope, or an atomic force microscope (AFM). In either embodiment, the surface roughness of a material may be characterized by the vertical distances between the bases of valleys and crests of their adjacent peaks. Since the dimensions of peaks and valleys may differ across a surface, calculating a statistical mean of a plurality of surface roughness measurements may yield a roughness that is more representative of the entire surface. For example, in some embodiments, an average of a plurality of surface roughness measurements may be calculated to produce a statistical mean of a material. In other embodiments, a root mean square of a plurality of surface roughness measurements may be calculated to produce a statistical mean of the material. In general, “root mean square” may be referred to as a measure of the magnitude of a set of numbers or measurements.
In some cases, the surface roughness of one or more layers within a semiconductor topography may affect the operation of a device formed from such a topography. For example, in cases including magnetic random access memory (MRAM) devices, layers with relatively rough surfaces may undesirably cause a junction within a device to breakdown at a relatively low voltage. In particular, relatively rough surfaces of layers within MRAM devices including magnetic tunneling junctions (MTJ) may cause a breakdown of the junction at a low voltage. In some cases, breakdown at a relatively low voltage may cause the device to frequently malfunction, thereby decreasing the reliability and/or yield of the device. In addition or alternatively, the threshold voltage by which the device is activated may be lower and thus, the junction breakdown may inhibit the entire operation of the device in some cases. In general, the breakdown of a MTJ may be attributed to an uneven tunneling layer within the junction. Since tunneling layers within MTJs are typically very thin (e.g., approximately 15 angstroms or less), the unevenness of such a layer may be caused by relatively rough surfaces of underlying layers. Consequently, it may be beneficial to deposit a layer with substantially smooth surfaces under such a tunneling layer.
Conventional deposition processes, however, have limited capability to produce layers with substantially smooth surfaces. In particular, deposition techniques used in the semiconductor fabrication industry typically produce layers with relatively rough topographies. For example, conventional deposition techniques may yield a root mean square surface roughness that is greater than approximately 100 angstroms and in some cases, greater than approximately several thousand angstroms. “Root mean square” may refer to a result of a statistical calculation correlating a plurality of measurements as described above. Moreover, the accumulation of layers with such surface roughnesses may cause an upper layer to have an even greater surface roughness than may be produced by a particular deposition technique.
Therefore, it would be desirable to develop a method for fabricating semiconductor layers with substantially smooth surfaces. In particular, it may be advantageous to develop an MRAM device, which includes substantially smooth layers underlying a tunneling layer. Consequently, a method for reducing the likelihood of junction breakdown within a MRAM device may be developed.